电源设计知识解析-电源设计中的去耦电容应用实例

电源往往是(shi)我(wo)们在电路设计过程(cheng)(cheng)中最(zui)容(rong)易忽略的环节。其实，作(zuo)为一款优秀的设计，电源设计应(ying)当是(shi)很重(zhong)要的，它很大程(cheng)(cheng)度影响(xiang)了(le)整个系(xi)统的性(xing)能和成本。

大(da)家(jia)对电容(rong)(rong)的(de)(de)(de)(de)概(gai)念大(da)多还停留在(zai)理想的(de)(de)(de)(de)电容(rong)(rong)阶段，一(yi)般认为电容(rong)(rong)就是一(yi)个(ge)C。却不(bu)知道(dao)(dao)电容(rong)(rong)还有很多重(zhong)要的(de)(de)(de)(de)参数(shu)，也不(bu)知道(dao)(dao)一(yi)个(ge)1uF的(de)(de)(de)(de)瓷(ci)片电容(rong)(rong)和一(yi)个(ge)1uF的(de)(de)(de)(de)铝电解电容(rong)(rong)有什么不(bu)同。实际的(de)(de)(de)(de)电容(rong)(rong)可以等效(xiao)成下面的(de)(de)(de)(de)电路形式：

C：电(dian)(dian)容(rong)(rong)(rong)容(rong)(rong)(rong)值(zhi)。一般(ban)是指在1kHz，1V 等效AC电(dian)(dian)压(ya)，直(zhi)流偏(pian)压(ya)为0V情况下测(ce)到的(de)(de)，不过(guo)也可有很多(duo)电(dian)(dian)容(rong)(rong)(rong)测(ce)量(liang)的(de)(de)环(huan)境不同。但有一点需注意，电(dian)(dian)容(rong)(rong)(rong)值(zhi)C本(ben)身是会随环(huan)境发生(sheng)改变(bian)的(de)(de)。

ESL：电(dian)(dian)容(rong)等效串联电(dian)(dian)感(gan)。电(dian)(dian)容(rong)的管(guan)脚(jiao)是存在电(dian)(dian)感(gan)的。在低频应(ying)用时感(gan)抗较小，所以(yi)可以(yi)不(bu)考虑(lv)(lv)。当频率(lv)(lv)较高时，就(jiu)要(yao)考虑(lv)(lv)这个(ge)电(dian)(dian)感(gan)了。举(ju)个(ge)例子(zi)，一个(ge)0805封装的0.1uF贴片电(dian)(dian)容(rong)，每(mei)管(guan)脚(jiao)电(dian)(dian)感(gan)1.2nH，那么ESL是2.4nH，可以(yi)算一下C和ESL的谐振频率(lv)(lv)为(wei)10MHz左右，当频率(lv)(lv)高于10MHz，则电(dian)(dian)容(rong)体(ti)现(xian)为(wei)电(dian)(dian)感(gan)特性。

ESR：电(dian)(dian)容(rong)等(deng)效(xiao)串(chuan)联(lian)电(dian)(dian)阻。无论哪种电(dian)(dian)容(rong)都(dou)会有一(yi)个等(deng)效(xiao)串(chuan)联(lian)电(dian)(dian)阻，当电(dian)(dian)容(rong)工作在谐振点(dian)频率时(shi)，电(dian)(dian)容(rong)的(de)容(rong)抗和感抗大(da)小相(xiang)等(deng)，于是等(deng)效(xiao)成一(yi)个电(dian)(dian)阻，这个电(dian)(dian)阻就是ESR。因电(dian)(dian)容(rong)结构(gou)不同而有很大(da)差异。铝(lv)电(dian)(dian)解电(dian)(dian)容(rong)ESR一(yi)般(ban)由几(ji)(ji)百(bai)毫(hao)欧到几(ji)(ji)欧，瓷(ci)片电(dian)(dian)容(rong)一(yi)般(ban)为(wei)几(ji)(ji)十(shi)毫(hao)欧，钽电(dian)(dian)容(rong)介于铝(lv)电(dian)(dian)解电(dian)(dian)容(rong)和瓷(ci)片电(dian)(dian)容(rong)之间(jian)。

下面我们看一些X7R材质瓷片电容的频率特性：

当然(ran)，电容(rong)相关的(de)参数还(hai)有很多，不过，设计中最(zui)重(zhong)要的(de)还(hai)是C和(he)ESR。

下面简单介绍一下我们常用到的三种电容：铝电解电容，瓷片电容和钽电容。

1）铝(lv)电(dian)(dian)容(rong)(rong)是由铝(lv)箔刻(ke)槽氧化后(hou)再夹绝缘层卷(juan)制，然(ran)后(hou)再浸电(dian)(dian)解质液(ye)制成(cheng)的(de)(de)，其原理(li)是化学(xue)原理(li)，电(dian)(dian)容(rong)(rong)充放电(dian)(dian)靠(kao)的(de)(de)是化学(xue)反应，电(dian)(dian)容(rong)(rong)对信号的(de)(de)响(xiang)应速度(du)(du)受电(dian)(dian)解质中带电(dian)(dian)离子的(de)(de)移动(dong)速度(du)(du)限制，一般都应用(yong)在频率较低（1M 以下）的(de)(de)滤波场合，ESR主要为铝(lv)萡(萡)电(dian)(dian)阻和(he)电(dian)(dian)解液(ye)等效电(dian)(dian)阻的(de)(de)和(he)，值比(bi)较大。铝(lv)电(dian)(dian)容(rong)(rong)的(de)(de)电(dian)(dian)解液(ye)会逐渐(jian)挥发(fa)而(er)导致(zhi)电(dian)(dian)容(rong)(rong)减小甚至失效，随温(wen)度(du)(du)升高(gao)(gao)挥发(fa)速度(du)(du)加快(kuai)。温(wen)度(du)(du)每升高(gao)(gao)10度(du)(du)，电(dian)(dian)解电(dian)(dian)容(rong)(rong)的(de)(de)寿命(ming)会减半(ban)。如(ru)果电(dian)(dian)容(rong)(rong)在室温(wen)27 度(du)(du)时能使用(yong)10000小时的(de)(de)话，57度(du)(du)的(de)(de)环境(jing)下只能使用(yong)1250小时。所(suo)以铝(lv)电(dian)(dian)解电(dian)(dian)容(rong)(rong)尽量不要太靠(kao)近热源。

2）瓷片(pian)电(dian)(dian)容(rong)存放(fang)电(dian)(dian)靠的(de)(de)(de)是(shi)(shi)物理(li)反应，因而具有(you)很高(gao)的(de)(de)(de)响(xiang)应速度(du)，可以应用(yong)到(dao)上G的(de)(de)(de)场合。不(bu)过，瓷片(pian)电(dian)(dian)容(rong)因为介(jie)(jie)质(zhi)(zhi)不(bu)同(tong)，也(ye)呈现很大(da)的(de)(de)(de)差异。性能最好的(de)(de)(de)是(shi)(shi)C0G材(cai)质(zhi)(zhi)的(de)(de)(de)电(dian)(dian)容(rong)，温(wen)度(du)系数(shu)小，不(bu)过材(cai)质(zhi)(zhi)介(jie)(jie)电(dian)(dian)常(chang)数(shu)小，所(suo)以容(rong)值(zhi)不(bu)可能做太大(da)。而性能最差的(de)(de)(de)是(shi)(shi)Z5U/Y5V材(cai)质(zhi)(zhi)，这种材(cai)质(zhi)(zhi)介(jie)(jie)电(dian)(dian)常(chang)数(shu)大(da)，所(suo)以容(rong)值(zhi)能做到(dao)几十(shi)微法。但是(shi)(shi)这种材(cai)质(zhi)(zhi)受温(wen)度(du)影(ying)响(xiang)和直(zhi)流(liu)(liu)偏(pian)压（直(zhi)流(liu)(liu)电(dian)(dian)压会(hui)致使材(cai)质(zhi)(zhi)极化，使电(dian)(dian)容(rong)量(liang)减小）影(ying)响(xiang)很严重。下(xia)面(mian)我们看一下(xia)C0G、X5R、Y5V三(san)种材(cai)质(zhi)(zhi)电(dian)(dian)容(rong)受环境温(wen)度(du)和直(zhi)流(liu)(liu)工作电(dian)(dian)压的(de)(de)(de)影(ying)响(xiang)。

可以看到C0G的(de)容值(zhi)基本不随温度(du)(du)变(bian)化，X5R稳定(ding)性稍差(cha)些，而(er)Y5V材质在60度(du)(du)时，容量变(bian)为标称值(zhi)的(de)50%。

可以看到(dao)50V 耐(nai)压的Y5V 瓷片电(dian)容(rong)在(zai)应用在(zai)30V 时，容(rong)量(liang)只(zhi)有(you)标称值的30%。陶瓷电(dian)容(rong)有(you)一个很大的缺点，就是易碎。所以需要避免磕碰，尽量(liang)远离(li)电(dian)路板易发生形变的地(di)方。

3）钽电(dian)容无论是原理和结(jie)构(gou)(gou)都像一(yi)个电(dian)池。下(xia)面是钽电(dian)容的内部(bu)结(jie)构(gou)(gou)示意图：

钽(tan)电(dian)(dian)容(rong)(rong)(rong)(rong)拥有(you)体(ti)积(ji)小、容(rong)(rong)(rong)(rong)量大(da)(da)(da)、速度快、ESR低等优势，价格也比较高(gao)。决定钽(tan)电(dian)(dian)容(rong)(rong)(rong)(rong)容(rong)(rong)(rong)(rong)量和耐(nai)压(ya)(ya)的(de)是(shi)原材料钽(tan)粉颗粒的(de)大(da)(da)(da)小。颗粒越细(xi)可(ke)以(yi)得到(dao)越大(da)(da)(da)的(de)电(dian)(dian)容(rong)(rong)(rong)(rong)，而(er)如(ru)果想(xiang)得到(dao)较大(da)(da)(da)的(de)耐(nai)压(ya)(ya)就需要较厚的(de)Ta2O5，这就要求使(shi)用颗粒大(da)(da)(da)些(xie)的(de)钽(tan)粉。所(suo)以(yi)体(ti)积(ji)相同要想(xiang)获得耐(nai)压(ya)(ya)高(gao)而(er)又容(rong)(rong)(rong)(rong)量大(da)(da)(da)的(de)钽(tan)电(dian)(dian)容(rong)(rong)(rong)(rong)难度很大(da)(da)(da)。钽(tan)电(dian)(dian)容(rong)(rong)(rong)(rong)需引起(qi)注意的(de)另一(yi)(yi)个地方是(shi)：钽(tan)电(dian)(dian)容(rong)(rong)(rong)(rong)比较容(rong)(rong)(rong)(rong)易击(ji)穿而(er)呈短(duan)路(lu)特性，抗浪(lang)涌能力差。很可(ke)能由于一(yi)(yi)个大(da)(da)(da)的(de)瞬间电(dian)(dian)流导(dao)致电(dian)(dian)容(rong)(rong)(rong)(rong)烧毁而(er)形成(cheng)短(duan)路(lu)。这在(zai)使(shi)用超大(da)(da)(da)容(rong)(rong)(rong)(rong)量钽(tan)电(dian)(dian)容(rong)(rong)(rong)(rong)时(shi)需考(kao)虑（比如(ru)1000uF 钽(tan)电(dian)(dian)容(rong)(rong)(rong)(rong)）。

从上(shang)面可以了解到(dao)不(bu)同的电(dian)容有不(bu)同的应用场(chang)合(he)，并不(bu)是价格越高越好(hao)。

下面(mian)讲一下电源设计中(zhong)电容的作用(yong)。

在电(dian)源设计(ji)应(ying)用(yong)中(zhong)，电(dian)容主(zhu)要用(yong)于滤(lv)波（filter）和退耦(ou)/旁(pang)路(lu)(lu)（decoupling/bypass）。滤(lv)波主(zhu)要指滤(lv)除外来噪(zao)声(sheng)，而(er)退耦(ou)/旁(pang)路(lu)(lu)（一(yi)种，以(yi)旁(pang)路(lu)(lu)的形式(shi)达到退耦(ou)效果，以(yi)后用(yong)“退耦(ou)”代替(ti)）是减小(xiao)局部电(dian)路(lu)(lu)对外的噪(zao)声(sheng)干扰。很多人容易(yi)把两者(zhe)搞(gao)混(hun)。下面我们看一(yi)个(ge)电(dian)路(lu)(lu)结构(gou)：

图(tu)中开关电(dian)(dian)(dian)(dian)源(yuan)为(wei)(wei)A和(he)B供电(dian)(dian)(dian)(dian)。电(dian)(dian)(dian)(dian)流(liu)经C1 后再经过(guo)一(yi)(yi)段PCB 走线（暂(zan)等(deng)效(xiao)(xiao)为(wei)(wei)一(yi)(yi)个(ge)电(dian)(dian)(dian)(dian)感，实际用(yong)(yong)电(dian)(dian)(dian)(dian)磁波(bo)理论分析这种等(deng)效(xiao)(xiao)是(shi)(shi)有误的(de)(de)(de)，但为(wei)(wei)方便理解，仍采用(yong)(yong)这种等(deng)效(xiao)(xiao)方式(shi)。）分开两路(lu)分别(bie)供给(ji)A 和(he)B。开关电(dian)(dian)(dian)(dian)源(yuan)出来的(de)(de)(de)纹波(bo)比较大(da)，于是(shi)(shi)我们(men)使用(yong)(yong)C1对电(dian)(dian)(dian)(dian)源(yuan)进行滤波(bo)，为(wei)(wei)A和(he)B提供稳定(ding)的(de)(de)(de)电(dian)(dian)(dian)(dian)压(ya)。C1需要(yao)尽可能的(de)(de)(de)靠(kao)近电(dian)(dian)(dian)(dian)源(yuan)放置。C2和(he)C3均为(wei)(wei)旁路(lu)电(dian)(dian)(dian)(dian)容，起(qi)(qi)退耦(ou)作用(yong)(yong)。当(dang)A在(zai)某一(yi)(yi)瞬间(jian)需要(yao)一(yi)(yi)个(ge)很大(da)的(de)(de)(de)电(dian)(dian)(dian)(dian)流(liu)时(shi)，如果没有C2 和(he)C3，那么会(hui)因(yin)为(wei)(wei)线路(lu)电(dian)(dian)(dian)(dian)感的(de)(de)(de)原(yuan)因(yin)A端(duan)的(de)(de)(de)电(dian)(dian)(dian)(dian)压(ya)会(hui)变(bian)低(di)，而B端(duan)电(dian)(dian)(dian)(dian)压(ya)同样(yang)受A端(duan)电(dian)(dian)(dian)(dian)压(ya)影响(xiang)而降低(di)，于是(shi)(shi)局部电(dian)(dian)(dian)(dian)路(lu)A的(de)(de)(de)电(dian)(dian)(dian)(dian)流(liu)变(bian)化引起(qi)(qi)了局部电(dian)(dian)(dian)(dian)路(lu)B的(de)(de)(de)电(dian)(dian)(dian)(dian)源(yuan)电(dian)(dian)(dian)(dian)压(ya)，从而对B电(dian)(dian)(dian)(dian)路(lu)的(de)(de)(de)信号产生影响(xiang)。同样(yang)，B的(de)(de)(de)电(dian)(dian)(dian)(dian)流(liu)变(bian)化也会(hui)对A 形成干扰。这就是(shi)(shi)“共路(lu)耦(ou)合干扰”。

增加了C2后，局部电路再需要一个瞬(shun)间的(de)(de)大电流(liu)(liu)(liu)的(de)(de)时(shi)候，电容C2可(ke)以为A暂时(shi)提供电流(liu)(liu)(liu)，即使(shi)共路部分电感存在，A端(duan)电压不会下降(jiang)太多。对B的(de)(de)影响也会减小很多。于(yu)是通过电流(liu)(liu)(liu)旁(pang)路起到(dao)了退(tui)耦的(de)(de)作(zuo)用(yong)。

一般滤(lv)波(bo)主要使(shi)(shi)用(yong)(yong)大容(rong)(rong)量电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)，对速度要求不是很快(kuai)，但对电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)值要求较大。一般使(shi)(shi)用(yong)(yong)铝(lv)(lv)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)解(jie)(jie)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)。浪涌电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)流较小的(de)(de)(de)情况下(xia)，使(shi)(shi)用(yong)(yong)钽(tan)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)代替铝(lv)(lv)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)解(jie)(jie)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)效果(guo)会更好(hao)一些。从上(shang)面的(de)(de)(de)例子我们(men)可(ke)(ke)以知道，作为退(tui)(tui)耦(ou)(ou)的(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)，必需有很快(kuai)的(de)(de)(de)响(xiang)应速度才(cai)能达到效果(guo)。如果(guo)图中(zhong)的(de)(de)(de)局(ju)部电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)路A 是指(zhi)一个芯片(pian)(pian)的(de)(de)(de)话，那么退(tui)(tui)耦(ou)(ou)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)要用(yong)(yong)瓷(ci)(ci)(ci)片(pian)(pian)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)，而(er)且电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)尽(jin)可(ke)(ke)能靠近芯片(pian)(pian)的(de)(de)(de)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)源引脚。而(er)如果(guo)“局(ju)部电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)路A”是指(zhi)一个功能模块(kuai)的(de)(de)(de)话，可(ke)(ke)以使(shi)(shi)用(yong)(yong)瓷(ci)(ci)(ci)片(pian)(pian)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)，如果(guo)容(rong)(rong)量不够也可(ke)(ke)以使(shi)(shi)用(yong)(yong)钽(tan)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)或铝(lv)(lv)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)解(jie)(jie)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)（前提(ti)是功能模块(kuai)中(zhong)各芯片(pian)(pian)都(dou)有了(le)退(tui)(tui)耦(ou)(ou)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)—瓷(ci)(ci)(ci)片(pian)(pian)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)）。滤(lv)波(bo)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)的(de)(de)(de)容(rong)(rong)量往往都(dou)可(ke)(ke)以从开(kai)关(guan)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)源芯片(pian)(pian)的(de)(de)(de)数据(ju)手册里找到计(ji)算公式(shi)。如果(guo)滤(lv)波(bo)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)路同(tong)时使(shi)(shi)用(yong)(yong)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)解(jie)(jie)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)、钽(tan)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)和(he)瓷(ci)(ci)(ci)片(pian)(pian)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)的(de)(de)(de)话，把电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)解(jie)(jie)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)放(fang)的(de)(de)(de)离(li)开(kai)关(guan)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)源最(zui)近，这样能保护钽(tan)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)。瓷(ci)(ci)(ci)片(pian)(pian)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)放(fang)在(zai)钽(tan)电(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)(dian)容(rong)(rong)后面。这样可(ke)(ke)以获得(de)最(zui)好(hao)的(de)(de)(de)滤(lv)波(bo)效果(guo)。

退(tui)耦(ou)电(dian)(dian)容(rong)(rong)(rong)需(xu)(xu)要(yao)满足(zu)两个(ge)要(yao)求，一个(ge)是(shi)容(rong)(rong)(rong)量需(xu)(xu)求，另一个(ge)是(shi)ESR需(xu)(xu)求。也就是(shi)说一个(ge)0.1uF的(de)(de)电(dian)(dian)容(rong)(rong)(rong)退(tui)耦(ou)效(xiao)果(guo)也许不(bu)如两个(ge)0.01uF电(dian)(dian)容(rong)(rong)(rong)效(xiao)果(guo)好(hao)。而且，0.01uF电(dian)(dian)容(rong)(rong)(rong)在较(jiao)高频段(duan)有更低的(de)(de)阻(zu)抗，在这些频段(duan)内如果(guo)一个(ge)0.01uF电(dian)(dian)容(rong)(rong)(rong)能达到容(rong)(rong)(rong)量需(xu)(xu)求，那么它将比0.1uF电(dian)(dian)容(rong)(rong)(rong)拥有更好(hao)的(de)(de)退(tui)耦(ou)效(xiao)果(guo)。

很多管脚较多的(de)高速芯片设计指导手册(ce)会给出电源(yuan)设计对(dui)退耦电容(rong)的(de)要(yao)(yao)求，比如一款500多脚的(de)BGA封(feng)装要(yao)(yao)求3.3V电源(yuan)至少有(you)30个瓷(ci)片电容(rong)，还要(yao)(yao)有(you)几个大电容(rong)，总容(rong)量要(yao)(yao)200uF以上。

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